Copper interconnection and the method for fabricating the same

ABSTRACT

A copper interconnection where holes in the vicinity of an interface are reduced to lower contribution of interface diffusion to Cu the EM, increase a lifetime, and simultaneously increase adhesiveness and resistance to stress migration is constituted in a manner that impurities  15  form a solid solution in the vicinity of an interface between a Cu layer  16  and a barrier metal layer  12 , the impurities are precipitated, and an amorphous Cu layer  14  is fabricated, or a compound with Cu is fabricated. The copper interconnection is also constituted in a manner that impurities  15  form a solid solution in the vicinity of an interface between the Cu layer  16  and a cap layer  19 , the impurities  15  are precipitated, and an amorphous Cu layer  14  is fabricated, or a compound with Cu is fabricated.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a copper interconnectionstructure and its fabrication method and, more particularly, to a copperinterconnection structure of a increasing Cu interconnection lifetime,and its fabrication method.

[0003] 2. Description of the Prior Art

[0004] It is well known that in recent years efforts have been made toachieve high performance and functionality of a semiconductor integratedcircuit used for an information electronic equipment such as a cellphone. Such a semiconductor integrated circuit has many circuitelements, for example transistors. It is also a well-known fact thatsuch a semiconductor integrated circuit is fabricated by using ahigh-precision semiconductor fabrication process. Further, in thehigh-precision semiconductor fabrication process, an interconnectionstructure of an increased interconnection lifetime, especially a copperinterconnection structure attracts attention.

[0005]FIGS. 1A to 1D are sectional views of a copper interconnectionillustrating a conventional copper interconnection fabrication process.Referring to FIGS. 1A to 1D, the conventional copper interconnectionstructure is provided with a barrier metal (Ta) layer 12 made of mainlyhigh melting point metal such as Ta on an insulating layer 11, a thinseed Cu layer 14 fabricated by sputtering a Cu interconnection layer 16a fabricated using a method such as electro plating to thickly depositCu, and an SiN layer 17 fabricated by using sputtering to deposit SiN orthe like.

[0006] Next, a conventional copper interconnection fabrication methodwill be described by referring to the sectional views of FIGS. 1A to 1Dagain.

[0007] First, according to the conventional copper interconnectionfabrication process, as shown in FIG. 1A, a Cu interconnection groove 10is fabricated on the insulating layer 11, then the barrier metal (Ta)layer 12 mainly made of high melting point metal such as Ta isfabricated thin by sputtering and, further as shown in FIG. 1B, seed Cuis thinly sputtered to fabricate the seed Cu layer 14. Subsequently, Cuis thickly deposited by a method such as electro-plating to fabricatethe Cu layer 16. This is subjected to heat treatment at about 400° C.for 10 min. to several hours according to an interconnection thicknessand/or an interconnection width to grow Cu grains, and uniformly fillthe groove. Subsequently, as shown in FIG. 1C, the layer is made flat bythe chemical mechanical polishing (CMP) method or the like to fabricatean interconnection 16 a. A surface of the interconnection 16 a istreated such as cleaning and/or plasma irradiation to remove a Cunatural oxide layer and, then, as shown in FIG. 1D, an insulating film,such as SiN or the like, is deposited by sputtering to fabricate the SiNlayer 17.

[0008] As an example of an electromigration (EM) suppression in an Alinterconnection, there is an example of adding a small amount ofimpurities such as Cu to Al as described in Japanese Patent ApplicationLaid-Open No. Hei 08 (1996)-107110 (paragraphs 0015 to 0020, FIG. 1).

[0009] Such impurities are added because as described in “Al—Ti andAl—Ti—Si thin alloy films”, Albertus G. Dirks, Tien Tien, and Janet M.Towner, pp. 2010, “Journal of Applied Physics”, vol. 59-6 (1968),impurities are precipitated on a grain boundary to lower a hole density,whereby contribution of grain boundary diffusion is reduced. In the Cuinterconnection, an EM main diffusion path is considered to be aninterface between Cu and other materials. Accordingly, interface holesmust be selectively removed.

[0010] However, in such a copper interconnection fabrication method,there are problems that an EM resistance of the copper interconnectionis low, and particularly, in a case of the copper interconnection widthis narrow, the copper interconnection has shorter lifetime than the Alinterconnection. A reason is that in the case of the Al interconnection,if an interconnection width is smaller than an average Al grain size,and a gain boundary becomes a bamboo structure, Al lattice diffusionbecomes a main diffusion mechanism. This lattice diffusion is muchslower than either grain boundary or interface diffusion. Thus, in thecase of the narrow interconnection where grain boundary diffusion isdominant which achieves a bamboo grain boundary structure, an EMlifetime is longer than a wide interconnection.

[0011] On the other hand, in the case of the Cu interconnection, even ifan interconnection width is smaller than an average Cu grain size, and agrain boundary becomes a bamboo structure, not Cu lattice diffusion butinterface diffusion becomes a main diffusion mechanism. Thus, anincrease in the EM lifetime observed in the case of the thin Alinterconnection is not seen in the case of the Cu interconnection. As aresult, in the case of an interconnection width is small, the Cuinterconnection has shorter lifetime than the Al interconnection.

SUMMARY OF THE INVENTION

[0012] Objects of the present invention are to provide a copperinterconnection structure which eliminates the foregoing drawbacks ofthe conventional art, and solves the technical problems to increase aninterconnection lifetime, and its fabrication method.

[0013] A constitution of a copper interconnection structure of thepresent invention is characterized in that in the vicinity of aninterface between Cu and barrier metal or between Cu and a cap layer, inorder to selectively reduce holes existed in an interface between Cu ora Cu alloy layer and a barrier metal layer, hole reduction impuritiesadded to Cu form a solid solution, the hole reduction impurities areprecipitated, amorphous Cu is provided or a compound with Cu is formed,whereby holes in the vicinity of the interface are reduced, contributionof interface diffusion to Cu EM is reduced, a lifetime is increased, andsimultaneously adhesiveness and resistance to stress migration areincreased.

[0014] A constitution of a copper interconnection fabrication method ofthe present invention is characterized in that after sputtering ofbarrier metal on an interconnection groove, in order to reduce holesexisted in an interface between Cu or a Cu alloy layer and a barriermetal layer, hole reduction impurities added to Cu are ion-implanted inthe barrier metal, heat treatment is executed, seed Cu is sputtered, andthen Cu which makes an interconnection is deposited thereon, the holereduction impurities form a solid solution in the vicinity of theinterface between Cu and the barrier metal, the hole reductionimpurities are precipitated, and amorphous Cu is provided or a compoundwith Cu is formed.

[0015] Further, a constitution of another copper interconnectionfabrication method of the present invention is characterized in that Cuor a Cu alloy is embedded in an interconnection groove fabricated in aninterconnection surface, an interconnection is fabricated by using theCMP method or the like, then impurities are ion-implanted in order toreduce holes existed in an interface between Cu or a Cu alloy layer anda barrier metal layer, heat treatment is executed, a surface of theinterconnection is treated such as cleaning and/or plasma irradiation toremove a Cu natural oxide layer, and then a cap layer is fabricated bysputtering to make Cu amorphous in the vicinity of an interface with thecap layer.

[0016] Furthermore, according to the present invention, in place ofion-implantation of the hole reduction impurities added to the Cuexecuted to selectively reduce the holes existed in the interfacebetween the Cu or the Cu alloy layer and the barrier metal layer, andthe heat treatment, the impurities can be diffused from thin layer byheat treatment in place of ion-implantation, and then diffused by heat.The step of executing the treatment such as cleaning and/or plasmairradiation on the surface of the interconnection to remove the Cunatural oxide layer can be executed after the fabrication of theinterconnection, and then the hole reduction impurities can beion-implanted. Further, the step of executing the treatment such ascleaning and/or plasma irradiation on the surface of the interconnectionto remove the Cu natural oxide layer can be executed after thefabrication of the interconnection, and then the hole reductionimpurities can be deposited by a very thin layer, and the hole reductionimpurities can be one of Nb, Ta, Si, Ru and V.

BRIEF DESCRIPTION OF THE DRAWINGS

[0017]FIGS. 1A to 1D are sectional views of a copper interconnectionillustrating a conventional copper interconnection fabrication process.

[0018]FIGS. 2A to 2E are sectional views of a copper interconnectionillustrating a copper interconnection fabrication process according to afirst embodiment of the present invention.

[0019]FIGS. 3A to 3E are sectional views of a copper interconnectionillustrating a copper interconnection fabrication process according to asecond embodiment of the present invention.

[0020]FIGS. 4A to 4E are sectional views of a copper interconnectionillustrating a copper interconnection fabrication process according to athird embodiment of the present invention.

[0021]FIGS. 5A to 5F are sectional views of a copper interconnectionillustrating a copper interconnection fabrication process according to afourth embodiment of the present invention.

[0022]FIGS. 6A to 6F are sectional views of a copper interconnectionillustrating a copper interconnection fabrication process according to afifth embodiment of the present invention.

[0023]FIGS. 7A to 7E are sectional views of a copper interconnectionillustrating a copper interconnection fabrication process according to asixth embodiment of the present invention.

[0024]FIGS. 8A to 8E are sectional views of a copper interconnectionillustrating a copper interconnection fabrication process according to aseventh embodiment of the present invention.

[0025]FIGS. 9A to 9E are sectional views of a copper interconnectionillustrating a copper interconnection fabrication process according toan eight embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] Next, detailed description will be made of a copperinterconnection structure and its fabrication method according toseveral embodiments of the present invention with reference to theaccompanying drawings.

[0027]FIGS. 2A to 2E are sectional views showing a process of afabrication method according to a first embodiment of the presentinvention. First, in the fabrication method of the first embodiment ofthe invention, as shown in FIG. 2A, after a Cu interconnection groove 10is fabricated on an insulating layer 11, a barrier metal (Ta) layer 12mainly made of high melting point metal such as Ta is fabricated thereonby sputtering. Subsequently, as shown in FIG. 2B, impurities 13 a suchas Nb are injected by injection energy of 2 keV to 5 keV, and a doseamount of 1.0E14 cm⁻², and subjected to annealing at about 900° C. forseveral min. Accordingly, the impurity Nb becomes a solid solution onthe surface to fabricate an impurity part (Nb) 15.

[0028] Then, as shown in FIG. 2C, seed Cu is thinly sputtered tofabricate a seed Cu layer 14, and Cu is thickly deposited subsequentlyby a method such as electro-plating to fabricate a Cu layer 16. The Culayer 16 is subjected to heat treatment at about 400° C. for about 10min. to several hours in accordance with an interconnection thicknessand/or an interconnection width to grow Cu grains, and uniformly fillthe groove. Subsequently, by using CMP method or the like, the layer ismade flat to fabricate an interconnection 16 a as shown in FIG. 2D. Asurface of the interconnection is treated such as cleaning and/or plasmairradiation to remove a Cu natural oxide layer and, then, as shown inFIG. 2E, SiN or the like is sputtered to fabricate an insulating layer17.

[0029] Thus, an interconnection structure is obtained, where theimpurity Nb 13 becomes a solid solution in the vicinity of an interfacebetween the seed Cu layer 14 and the Ta barrier metal layer 12 of theinterconnection layer.

[0030] On the other hand, an interconnection structure can be obtained,where an impurity Si in place of the impurity Nb 13 is precipitated inthe vicinity of the interface between the seed Cu layer 14 and the Tabarrier metal layer 12 of the interconnection layer. First, as in thecase of the fabrication process of the interconnection structure wherethe impurity Nb 13 becomes a solid solution in the vicinity of theinterface between the seed Cu layer 14 and the Ta barrier metal layer 12of the interconnection layer, a barrier metal (Ta) layer 12 isfabricated by sputtering as shown in FIG. 2A.

[0031] Subsequently, as shown in FIG. 2B, impurities such as Si areinjected by injection energy of 5 keV to 10 keV, and a dose amount of2.0E14 cm⁻² to 5.0E14 cm⁻², and subjected to annealing at about 850° C.for several min. Accordingly, the impurity Si is precipitated on a verysurface of Ta to fabricate an impurity (Si) part 15 a.

[0032] The process thereafter is similar to the fabrication process ofthe interconnection structure where the impurity Nb 13 becomes a solidsolution in the vicinity of the interface between the seed Cu layer 14and the Ta barrier metal layer 12 of the interconnection layer, that is,the steps from FIGS. 2C to 2E are sequentially executed.

[0033] The embodiment has been described by way of example where theinterconnection groove 10 is fabricated on the insulating layer 11.Apparently, however, the interconnection groove 10 can be fabricated ona semiconductor layer, another interconnection layer and/or acombination thereof.

[0034]FIGS. 3A to 3E are sectional views showing a process of afabrication method according to a second embodiment of the presentinvention. First, in the fabrication method of the second embodiment ofthe invention, as shown in FIG. 3A, after a Cu interconnection groove 10is fabricated on an insulating layer 11, a barrier metal (Ta) layer 12mainly made of high melting point metal such as Ta, and a seed Cu layer14 made of seed Cu are fabricated thin by sputtering. Subsequently, asshown in FIG. 3B, impurities 13 a such as Ta are injected by injectionenergy of 5.0 keV, and a dose amount of 1.0E15 cm⁻², and subjected toannealing at about 900° C. for several min. Accordingly, Cu becomesamorphous in the vicinity of an interface between the seed Cu and thebarrier Ta to from an amorphous Cu layer 14 a. Subsequently, as shown inFIG. 3C, Cu is thickly deposited by a method such as electro-plating tofabricate a Cu layer 16. The Cu layer 16 is subjected to heat treatmentat about 400° C. for about 10 min. to several hours in accordance withan interconnection thickness and/or an interconnection width to grow Cugrains, and uniformly fill the interconnection groove.

[0035] Subsequently, by using CMP method or the like, an interconnection16 a is fabricated as shown in FIG. 3D. A surface of the interconnectionis treated such as cleaning and/or plasma irradiation to remove a Cunatural oxide layer and, then, as shown in FIG. 3E, SiN or the like issputtered to fabricate an insulating layer 17. Thus, an interconnectionstructure is obtained, where there is an amorphous Cu layer 14 a in aninterface between the seed Cu layer 14 and the Ta layer 12.

[0036]FIGS. 4A to 4E are sectional views showing a process of afabrication method according to a third embodiment of the presentinvention. First, in the fabrication method of the third embodiment ofthe invention, as shown in FIG. 4A, after a Cu interconnection groove 10is fabricated on an insulating layer 11, a barrier metal layer 12 mainlymade of high melting point metal such as Ta, and a seed Cu layer 14 madeof seed Cu are fabricated thin by sputtering. Subsequently, as shown inFIG. 4B, a solid phase Si layer 18 containing impurities such as Si isfabricated by several nm, and subjected to annealing at about 900° C.for several min., to fabricate a Cu—Si compound layer 18 a in aninterface between the seed Cu layer 14 and the Ta layer 12. As shown inFIG. 4C, Cu is thickly deposited by a method such as electro-plating tofabricate a Cu layer 16. The Cu layer 16 is subjected to heat treatmentat about 400° C. for about 10 min. to several hours in accordance withan interconnection thickness and/or an interconnection width to grow Cugrains, and uniformly fill the groove 10.

[0037] Subsequently, by using CMP method or the like, an interconnection18 a is fabricated as shown in FIG. 4D. A surface of the interconnectionis treated such as cleaning and/or plasma irradiation to remove a Cunatural oxide layer and, then, as shown in FIG. 4E, SiN or the like isdeposited by sputtering to fabricate an insulating layer 17. Thus, aninterconnection structure is obtained, where there is a Cu—Si compoundlayer. 18 a in an interface between the seed Cu layer 14 and the barriermetal Ta layer 12.

[0038]FIGS. 5A to 5F are sectional views showing a process of afabrication method according to a fourth embodiment of the presentinvention. First, in the fabrication method of the fourth embodiment ofthe invention, as shown in FIG. 5A, after a Cu interconnection groove 10is fabricated on an insulating layer 11, a barrier metal layer 12 mainlymade of high melting point metal such as Ta, and a seed Cu layer 14 madeof seed Cu are fabricated thin by sputtering. Subsequently, Cu isthickly deposited by a method such as electro-plating to fabricate a Culayer 16. This layer is subjected to heat treatment at about 400° C. forabout 10 min. to several hours in accordance with an interconnectionthickness and/or an interconnection width to grow Cu grains, anduniformly fill the groove.

[0039] Subsequently, by using CMP method or the like, an interconnection16 a is fabricated as shown in FIG. 5B. In the drawing, a CuOx naturaloxide film 20 is shown on the Cu layer 16. Here, as shown in FIG. 5C,impurities 21 such as V are injected by injection energy of 2 keV to 5keV, and a dose amount of 1.0E14 cm⁻², and subjected to annealing atabout 900° C. for several min. The impurity V becomes a solid solutionin the vicinity of an interface CuOx 20 and the interconnection Cu ofthe surface. As shown in FIG. 5E, a surface of the interconnection istreated such as cleaning and/or plasma irradiation to remove the Cunatural oxide layer 20 and, then, as shown in FIG. 5F, SiN or the likeis deposited by sputtering. Thus, an interconnection structure isobtained, where an impurity V layer 21 a becomes a solid solution in aninterface between a cap SiN 17 and the Cu layer 16.

[0040]FIGS. 6A to 6F are sectional views showing a process of afabrication method according to a fifth embodiment of the presentinvention. First, in the fabrication method of the fifth embodiment ofthe invention, as shown in FIG. 6A, after a Cu interconnection groove 10is fabricated on an insulating layer 11, a barrier metal layer 12 mainlymade of high melting point metal such as Ta, and a seed Cu layer 14 arefabricated thin by sputtering. Subsequently, Cu is thickly deposited bya method such as electro-plating to fabricate a Cu layer 16. This layeris subjected to heat treatment at about 400° C. for about 10 min. toseveral hours in accordance with an interconnection thickness and/or aninterconnection width to grow Cu grains, and uniformly fill the groove.In the drawing, a CuOx natural oxide film 20 is shown on the Cu layer16.

[0041] Subsequently, as shown in FIG. 6B, CMP method or the like is usedto fabricate an interconnection, and a surface of the interconnection istreated such as cleaning and/or plasma irradiation to remove the Cunatural oxide layer 20 as shown in FIG. 6C. As shown in FIG. 6D,impurities such as Si are injected by injection energy of 5 keV to 10keV, and a dose amount of 1.0E15 cm⁻², and subjected to annealing atabout 900° C. for several min. An amorphous Cu layer is fabricated inthe vicinity of the surface of the Cu layer. Subsequently, SiN or thelike is deposited by sputtering. Thus, an interconnection structure isobtained, where there is an amorphous Cu layer 23 in an interfacebetween a cap SiN 17.and the Cu layer 16.

[0042] Next, description will be made of single and dual damascenestructures, and a fabrication method thereof when the present inventionis applied to the single damascene structure having a multilayerinterconnection including at least one of such interconnections, forexample the above-described interconnection structure of each layer, orthe dual damascene structure having the above-described interconnectionstructure over two layers, for example a via hole and its upper layerinterconnection.

[0043] First, the case where the invention is applied to the singledamascene structure is described. FIGS. 7A to 7E are sectional viewsshowing a fabrication process of a copper interconnection according to asixth embodiment of the present invention.

[0044] According to the fabrication method of the multiplayerinterconnection of the sixth embodiment of the invention where thecopper interconnection fabrication method of the embodiment is appliedto the single damascene structure, as shown in FIG. 7A, after a Cuinterconnection groove 10 is fabricated, a barrier metal layer 12 mainlymade of high melting point metal such as Ta is sputtered. Subsequently,impurities such as Nb 13 are injected by injection energy of 2 keV to 5keV, and a dose amount of 1.0E14 cm⁻², and subjected to annealing atabout 350° C. for several min.

[0045] As shown in FIG. 7B, the impurity Nb becomes a solid solution ona very surface of the Ta layer 12. A seed Cu layer 14 is thinlysputtered, and then a Cu layer 16 is fabricated thick by a method suchas electro-plating. This layer is subjected to heat treatment at about250 to 350° C. for 5 min. to several hours in accordance with aninterconnection thickness and/or an interconnection width to grow Cugrains, and uniformly fill the groove.

[0046] Subsequently, by using CMP method or the like, an interconnection16 a is fabricated as shown in FIG. 7C. A surface of the interconnectionis treated such as cleaning and/or plasma irradiation to remove a Cunatural oxide layer and, then, an SiC layer 17 or the like is fabricatedby sputtering. Thus, an interconnection structure is obtained, where animpurity Nb 15 becomes a solid solution in an interface between the seedCu layer 14 and the Ta layer 12, and this interconnection is set as alower layer interconnection.

[0047] Then, a low dielectric constant film 11 a as an interlayerinsulating film, and an SiCN layer 17 a are fabricated thin. A via hole71 is fabricated by a normal etching method, and treated such as ashingand/or cleaning. For this via hole 71, as in the case of theinterconnection groove, sputtering of a barrier metal layer 12 a of Taor the like, injection of impurities 15 a such as Nb and annealing, andsputtering of a seed Cu layer 14 b, and electro-plating and annealing ofa Cu layer 16 a are executed.

[0048] Subsequently, CMP is executed to fabricate a via hole constitutedof the barrier metal layer 12 a of Ta or the like, the seed Cu layer 14b, the impurities 15 a such as Nb, and the Cu layer 16. Then, as shownin FIG. 7D, an interlayer insulating film 11 a is fabricated, and anupper layer interconnection is fabricated by a method similar to that ofthe lower layer interconnection and, accordingly as shown in FIG. 7E, amultilayer interconnection of a single damascene structure isfabricated.

[0049] The embodiment shows the structure where the impurity becomes asolid solution in the interface between the seed Cu layer and the Talayer in all of the lower layer interconnection, the via hole, and theupper layer interconnection. However, a structure can also befabricated, where the invention is applied to one of the lower layerinterconnection, the via hole and the upper layer interconnection.Moreover, the number of interconnection layers is not limited to two,and the invention can be applied to a case of much more layers. Theembodiment shows the case of the via hole made of Cu. However, othermaterials such as W may be used.

[0050] Next, description is made of a case of applying the copperinterconnection fabrication method of the embodiment of the invention toa via first structure in a dual damascene structure. FIG. 8A to 8E aresectional views showing a copper interconnection fabrication processaccording to a seventh embodiment of the present invention.

[0051] According to the fabrication method of the multiplayerinterconnection of the seventh embodiment of the invention where thecopper interconnection fabrication method of the embodiment is appliedto a via first structure in a dual damascene structure, as shown in FIG.8A, after a Cu interconnection groove, is fabricated, a barrier metallayer 12 mainly made of high melting point metal such as Ta, and a seedCu layer 14 are thinly sputtered. Subsequently, impurities such as Taare injected by injection energy of 5 keV, and a dose amount of 1.0E15cm⁻², and subjected to annealing at about 400° C. for several min. Asshown in FIG. 8B, Cu in the vicinity of an interface between the seedlayer Cu 14 and the Ta barrier metal layer 12 become amorphous.

[0052] Subsequently, a Cu layer 16 a is fabricated thick by a methodsuch as electro-plating. This layer is subjected to heat treatment atabout 380° C. for 10 min. to several hours in accordance with aninterconnection thickness and/or an interconnection width to grow Cugrains, and uniformly fill the groove. Subsequently, by using CMP methodor the like, an interconnection is fabricated.

[0053] Further, as shown in FIG. 8C, a surface of the interconnection istreated such as cleaning and/or plasma irradiation to remove a Cunatural oxide layer and, then, an SiC layer 17 or the like is fabricatedby sputtering. Thus, an interconnection structure is obtained, wherethere is an amorphous Cu layer 14 a in the interface between the seed Culayer and the Ta layer, and this interconnection is set as a lower layerinterconnection.

[0054] Further, a low dielectric constant film 11 a as an interlayerinsulating film of a via hole part 81, and an SiCN layer 17 a or thelike are fabricated. Subsequently, a low dielectric constant film as aninterlayer insulating film of an upper layer interconnection, and anSiO₂ film 11 b are fabricated. Then, an anti-reflection compound (ARC)film, a photoresist and an etching mask are fabricated and, by using gascontaining fluorocarbon or the like, the via hole 81 is opened byetching.

[0055] Then, as shown in FIG. 8D, after treatment such as (wet) cleaningof the opening, a film prevented from a reflection, a photoresist, andan etching mask are deposited to fabricate an upper layerinterconnection groove 82. As shown in FIG. 8E, after normal treatmentsuch as wet cleaning and/or cleaning, as in the case of the lower layerinterconnection, sputtering of a barrier metal layer 12 c mainly made ofhigh melting point metal such as Ta, and a seed Cu layer 14d areexecuted, impurities such as Ta 13 c are injected by injection energy of5 keV, and a dose amount of 1.0E15 cm⁻², and subjected to annealing, andCu in the vicinity of an interface between the seed Cu layer and the Tabarrier layer becomes amorphous.

[0056] Subsequently, a Cu layer 16 d is fabricated thick by a methodsuch as electro-plating. This layer is subjected to heat treatment atabout 350° C. for 10 min. to several hours in accordance with aninterconnection thickness and/or an interconnection width to grow Cugrains, and uniformly fill the groove.

[0057] Subsequently, by using CMP method or the like, an interconnectionis fabricated. A surface of the interconnection is treated such ascleaning and/or plasma irradiation to remove a Cu natural oxide layerand, then, an SiN layer 17 or the like is fabricated by sputtering.Thus, a laminated structure can be fabricated, where there is anamorphous Cu layer 14 f in an interface between the seed Cu layer andthe Ta layer, and this interconnection is set as a lower layerinterconnection.

[0058] The embodiment shows the structure where the amorphous Cu layer14 f is present in the interface between the seed Cu layer and the Talayer in both of the lower layer interconnection/the via hole and theupper layer interconnection. However, a structure can also befabricated, where the invention is applied to one of the lower layerinterconnection/the via hole and the upper layer interconnection.Moreover, the number of interconnection layers is not limited to two,and the invention can be applied to a case of much more layers.

[0059] Next, as a dual damascene fabrication method, in addition to themethod for opening the via hole shown in the copper interconnectionfabrication method of the seventh embodiment of the invention, and thenfabricating the interconnection groove for the upper layerinterconnection (via first), an example of a method for firstfabricating an interconnection groove, and then a via hole (trenchfirst) will be described as a copper interconnection fabrication methodof an eight embodiment of the present invention.

[0060] That is, description is made of a case where the invention isapplied to a trench first structure in a dual damascene structure. FIGS.9A to 9E are sectional views showing a copper interconnectionfabrication process according to an eighth embodiment of the presentinvention.

[0061] According to the fabrication method of the multiplayerinterconnection of the eighth embodiment of the invention where thecopper interconnection fabrication method of the embodiment is appliedto a via first structure in a dual damascene structure, as shown in FIG.9A, after a Cu interconnection groove is fabricated, a barrier metallayer 12 mainly made of high melting point metal such as Ta, and a seedCu layer 14 are thinly sputtered.

[0062] Subsequently, a solid phase containing impurities such as Si (18)are deposited, and subjected to annealing at about 400° C. for severalmin., to fabricate a Cu—Si compound 18 a in an interface between theseed layer Cu 14 and the Ta barrier metal layer 12 as shown in FIG. 9B.Subsequently, a Cu layer 16 a is fabricated thick by a method such aselectro-plating. This layer is subjected to heat treatment at about 350to 400° C. for 10 min. to several hours in accordance with aninterconnection thickness and/or an interconnection width to grow Cugrains, and uniformly fill the groove.

[0063] Subsequently, as shown in FIG. 9C, by using CMP method or thelike, an interconnection is fabricated. A surface of the interconnectionis treated such as cleaning and/or plasma irradiation to remove a Cunatural oxide layer and, then, an SiN layer 17 or the like is fabricatedby sputtering. Thus, an interconnection structure is obtained, wherethere is a Cu—Si compound 18 a in the interface between the seed Culayer and the Ta layer, and this interconnection is set as a lower layerinterconnection.

[0064] A low dielectric constant film 11 c as an interlayer insulatingfilm of a via hole part, and an SiCN layer 17 d or the like arefabricated. Subsequently, a low dielectric constant film as aninterlayer insulating film of an upper layer interconnection, and anSiO₂ film 11 d are fabricated. Then, a reflection prevention film, aphotoresist and an etching mask are fabricated and, by using gascontaining fluorocarbon or the like, an upper layer interconnectiongroove 91 is opened by etching.

[0065] Then, as shown in FIG. 9D, after removal of the etching mask, areflection prevention film for via hole opening, a photoresist, and anetching mask are fabricated, and etched to fabricate a via hole 92.

[0066] After normal treatment such as wet cleaning and/or cleaning, asin the case of the lower layer interconnection, sputtering of a barriermetal layer 12 d mainly made of high melting point metal such as Ta, anda seed Cu layer 14 g are executed, impurities such as Ta 12 d areinjected (injection energy of 5 keV, and a dose amount of 1.0E15 cm⁻²),and subjected to annealing, and Cu 18 b, 18 c in the vicinity of aninterface between the seed Cu layer and the Ta barrier layer becomesamorphous.

[0067] Subsequently, as shown in FIG. 9E, a Cu layer 16 e is fabricatedthick by a method such as electro-plating. This layer is subjected toheat treatment at about 380° C. for 10 min. to several hours inaccordance with an interconnection thickness and/or an interconnectionwidth to grow Cu grains, and uniformly fill the groove. Subsequently, byusing CMP method or the like, an interconnection is fabricated. Asurface of the interconnection is treated such as cleaning and/or plasmairradiation to remove a Cu natural oxide layer and, then, an SiN layer17 f or the like is fabricated by sputtering. Thus, an interconnectionstructure can be fabricated, where there is a seed Cu layer 14 g in aninterface between the seed Cu layer and the Ta layer, and thisinterconnection is set as an upper layer interconnection.

[0068] The embodiment shows the interconnection structure where theamorphous Cu layer is present in the interface between the seed Cu layerand the Ta layer in the lower layer interconnection, and the Cu—Sicompound is present, in the interface between the seed Cu layer and theTa layer in the via hole and the upper layer interconnection. However,application can be made to various combinations, e.g., a case wherestructures are similar between the lower layer interconnection/the viahole and the upper layer interconnection, a case where in one of thestructures, one of the copper interconnection fabrication methods of thefirst to fifth embodiments of the invention is employed, and othercases. Moreover, the number of interconnection layers is not limited totwo, and the invention can be applied to a case of much more layers.

[0069] In the diffusion mechanism of the EM, there are latticediffusion, grain boundary diffusion, interface diffusion, and the likedepending on a main diffusion path. It is known that the diffusion iscarried out via holes in many cases. In such a case, hole generationoccurs at a first stage, holes are exchanged (accordingly materialmovement) at a second stage, and it is said that substantially equalamounts of activation energy are needed for both. Thus, in both grainboundary diffusion and interface diffusion executed through a grainboundary or an interface where there are many holes, activation energyis lower than lattice diffusion becase of lack of hole-generationactivation energy to make diffusion faster.

[0070] For an EM suppression in the Al interconnection, as described inPatent Document 1, there is an example of adding a small amount ofimpurities such as Cu to Al. This is employed because as described inNonpatent Document 1, impurities are deposited in an Al grain boundaryto lower a hole density, whereby contribution of grain boundarydiffusion is reduced. In the Cu interconnection, an dominant EMdiffusion path is considered to be an interface with other materials.Thus, interface holes may be selectively removed.

[0071] As impurities to be added to Cu, many are possible. In additionto those deposited in the interface, as,an example, Nb or Ta which fullyfabricates a solid solution with Cu is suitable. For example, in the Cuand Nb system, a Cu—Nb compound is continuously present in an interfacebetween Cu and Nb to greatly reduce holes. Compared with the case whereimpurities are deposited, this example is also advantageous in thatthere no resistance increases by impurities. V belonging to the samegroup as Nb may also be suitable.

[0072] Recently, a Cu—Si compound has been considered to contribute toan EM improvement. Thus, a method of implanting Si ions by goodcontrollability, or the like is also preferable. In addition, Ru whichcauses an oxide to exhibit good conductivity is also preferable from thestandpoint of removing CuOx from the interface and maintainingconductivity as RuOx.

[0073] Further, from the standpoint of making an interface structurecontinuous, it may be effective to make Cu amorphous to remove holes.Accordingly, ion implantation conditions of impurities may be conditionsfor making the vicinity of a very surface of Cu amorphous. An advantageaccompanying the amorphous vicinity of the Cu interface is animprovement in physical properties such as adhesiveness and mechanicalstrength made by elimination of stress imbalance or local concentrationto a passivation film such as a cap layer caused by a difference ingrowth rate according to criystal orientation during Cu crystal growthwhich occurs even at a room temperature. Moreover, the Cu amorphoustreatment executed before the above-described CuSix treatment providesmany effects such as uniform generation of CuSix.

[0074] As apparent from the foregoing, the present invention iseffective in that when an interconnection width is narrower than anaverage Cu grain size, and a grain boundary becomes a bamboo structure,a bamboo effect for increasing a lifetime appears, and thus a lifetimeis increased by about two digits compared with the Al interconnection.

[0075] A reason is that if there are impurities deposited in a gap inthe vicinity of the interface between Cu and barrier metal (or cap), orif there is amorphous Cu in the interface between Cu and barrier metal(or cap), the number of holes, many being present in the interfacebetween normal different materials, is reduced, and thus interfacediffusion occurring through the holes can be suppressed. Accordingly, asCu diffusion path by the EM, interface contribution is reduced, wherebya main Cu diffusion mechanism becomes lattice diffusion.

[0076] The impurities are not only precipitated in the interface, butmay fabricate a compound in the interface. For example, it is known thatTa, Nb or the like fully fabricates a solid solution with Cu. Presenceof such a compound may reduce holes in the interface to increase an EMlifetime. There is a report that silicide treatment of the Cu surfaceincreases an EM lifetime, and its combination with the present inventioncan expectedly increase the lifetime more.

[0077] Use in the multilayer interconnection provides large resistanceto stress migration caused by heat treatment executed for fabrication ofeach layer. In the single damascene structure, selection of a materialof a melting point higher than that of Cu for a via hole enablesfabrication of an interconnection structure of high interconnectionreliability. In the dual damascene structure, since via adhesiveness canbe enhanced, contribution can be made to a reduction in an initialfailure rate, and Cu aggregation in the via which is one of failuremodes can be suppressed.

What is claimed is:
 1. A copper interconnection comprising: a barriermetal layer fabricated on an interconnection groove; a Cu or Cu alloylayer for an interconnection fabricated on said barrier metal layer; andhole reduction impurities added to said Cu precipitated in a firstinterface in order to reduce holes fabricated in said first interfacebetween said Cu or Cu alloy layer and said barrier metal layer.
 2. Acopper interconnection comprising: a barrier metal layer fabricated onan interconnection groove; a Cu or Cu alloy layer for an interconnectionfabricated on said barrier metal layer; and hole reduction impuritiesadded to said Cu to fabricate a solid solution with said Cu in a firstinterface in order to reduce holes fabricated in said first interfacebetween said Cu or Cu alloy layer and said barrier metal layer.
 3. Acopper interconnection comprising: a barrier metal layer fabricated onan interconnection groove; a Cu or Cu alloy layer for an interconnectionfabricated on said barrier metal layer; and a hole reduction amorphouslayer present in a first interface, in which said Cu is made amorphous,in order to reduce holes fabricated in said first interface between saidCu or Cu alloy layer and said barrier metal layer.
 4. A copperinterconnection comprising: a barrier metal layer fabricated on aninterconnection groove; a Cu or Cu alloy layer for an interconnectionfabricated on said barrier metal layer; and a hole reduction compoundlayer present in a first interface, in which a compound with said Cu isfabricated, in order to reduce holes fabricated in said first interfacebetween said Cu or Cu alloy layer and said barrier metal layer.
 5. Acopper interconnection comprising: a barrier metal layer fabricated onan interconnection groove; a Cu or Cu alloy layer for an interconnectionfabricated on said barrier metal layer; an insulating cap layerfabricated on said Cu or Cu alloy layer to protect and insulate said Cuor Cu alloy layer; and hole reduction impurities added to said Cuprecipitated in a second interface in order to reduce holes fabricatedin said second interface between said Cu or Cu alloy layer and saidinsulating cap layer.
 6. A copper interconnection comprising: a barriermetal layer fabricated on an interconnection groove; a Cu or Cu alloylayer for an interconnection fabricated on said barrier metal layer; aninsulating cap layer fabricated on said Cu or Cu alloy layer to protectand insulate said Cu or Cu alloy layer; and hole reduction impuritiesadded to said Cu to fabricate a solid solution with said Cu in a secondinterface in order to reduce holes fabricated in said second interfacebetween said Cu or Cu alloy layer and said insulating cap layer.
 7. Acopper interconnection comprising: a barrier metal layer fabricated onan interconnection groove; a Cu or Cu alloy layer for an interconnectionfabricated on said barrier metal layer; an insulating cap layerfabricated on said Cu or Cu alloy layer to protect and insulate said Cuor Cu alloy layer; and a hole reduction amorphous layer present in asecond interface, in which said Cu is made amorphous, in order to reduceholes fabricated in said second interface between said Cu or Cu alloylayer and said insulating cap layer.
 8. A copper interconnectioncomprising: a barrier metal layer fabricated on an interconnectiongroove; a Cu or Cu alloy layer for an interconnection fabricated on saidbarrier metal layer; an insulating cap layer fabricated on said Cu or Cualloy layer to protect and insulate said Cu or Cu alloy layer; and ahole reduction compound layer present in a second interface, in which acompound with said Cu is fabricated, in order to reduce holes fabricatedin said second interface between said Cu or Cu alloy layer and saidinsulating cap layer.
 9. The copper interconnection according to claim1, wherein said hole reduction impurities added to said Cu is oneselected from Nb, Ta, Si, Ru, and V.
 10. The copper interconnectionaccording to claim 5, wherein said hole reduction impurities added tosaid Cu is one selected from Nb, Ta, Si, Ru, and V.
 11. A method formanufacturing a copper interconnection, comprising: a barrier metalsputtering step of sputtering barrier metal on an interconnectiongroove; a hole reduction impurity fabricating step(A) of ion-implantinghole reduction impurities in said barrier metal in order to reduce holesfabricated in a first interface between a Cu or Cu alloy layer for aninterconnection and said barrier metal layer after said barrier metalsputtering step, and executing heat treatment; a seed Cu sputtering stepof sputtering seed Cu which becomes a seed after said hole reductionimpurity fabricating step(A); a Cu depositing step of depositing Cuwhich makes an interconnection on said seed Cu after said seed Cusputtering step; and, thereby making said hole reduction impuritiesprecipitate in said vicinity of said first interface.
 12. The method formanufacturing a copper interconnection, according to claim 11, whereinin place of making said hole reduction impurities precipitate in saidvicinity of said first interface, fabricating a solid solution of saidhole reduction impurities with said Cu in said vicinity of said firstinterface.
 13. The method for manufacturing a copper interconnection,according to claim 11, wherein in place of making said hole reductionimpurities precipitate in said vicinity of said first interface, makingsaid hole reduction impurities a Cu amorphous in said vicinity of saidfirst interface.
 14. The method for manufacturing a copperinterconnection, according to claim 11, wherein in place of making saidhole reduction impurities precipitate in said vicinity of said firstinterface, fabricating a Cu compound with said Cu in said vicinity ofsaid first interface.
 15. A method for manufacturing a copperinterconnection, comprising: a barrier metal sputtering step ofsputtering barrier metal on an interconnection groove; a hole reductionimpurity fabricating step(B) of depositing hole reduction impurities bya solid phase in order to reduce holes fabricated in a first interfacebetween a Cu or Cu alloy layer for an interconnection and said barriermetal layer after said sputtering step, and diffusing said impurities byheat; a seed Cu sputtering step of sputtering seed Cu which becomes aseed after said hole reduction impurity fabricating step(B); a Cudepositing step of depositing Cu which makes an interconnection on saidseed Cu after said seed Cu sputtering step; and, thereby making saidhole reduction impurities precipitate in said vicinity of said firstinterface.
 16. The method for manufacturing a copper interconnection,according to claim 15, wherein in place of making said hole reductionimpurities precipitate in said vicinity of said first interface,fabricating a solid solution of said hole reduction impurities with saidCu in said vicinity of said first interface.
 17. The method formanufacturing a copper interconnection, according to claim 15, whereinin place of making said hole reduction impurities precipitate in saidvicinity of said first interface, fabricating a Cu compound with said Cuin said vicinity of said first interface.
 18. A method for manufacturinga copper interconnection, comprising: a barrier metal sputtering step ofsputtering barrier metal on an interconnection groove; a seed Cusputtering step of sputtering seed Cu which becomes a seed after saidbarrier metal sputtering step; a hole reduction impurity fabricatingstep(A) of ion-implanting hole reduction impurities in said barriermetal in order to reduce holes fabricated in a first interface between aCu or Cu alloy layer for an interconnection and said barrier metal layerafter said seed Cu sputtering step, and executing heat treatment; a Cudepositing step of depositing Cu which makes an interconnection on saidseed Cu after said hole reduction impurity fabricating step(A); and,thereby making said hole reduction impurities precipitate in saidvicinity of said first interface.
 19. The method for manufacturing acopper interconnection, according to claim 18, wherein in place ofmaking said hole reduction impurities precipitate in said vicinity ofsaid first interface, fabricating a solid solution of said holereduction impurities with said Cu in said vicinity of said firstinterface.
 20. The method for manufacturing a copper interconnection,according to claim 18, wherein in place of making said hole reductionimpurities precipitate in said vicinity of said first interface, makingsaid hole reduction impurities a Cu amorphous in said vicinity of saidfirst interface.
 21. The method for manufacturing a copperinterconnection, according to claim 18, wherein in place of making saidhole reduction impurities precipitate in said vicinity of said firstinterface, fabricating a Cu compound with said Cu in said vicinity ofsaid first interface.
 22. A method for manufacturing a copperinterconnection, comprising: a barrier metal sputtering step ofsputtering barrier metal on an interconnection groove; a seed Cusputtering step of sputtering seed Cu which becomes a seed after saidbarrier metal sputtering step; a Cu interconnection fabricating step ofembedding a Cu or Cu alloy layer in said interconnection groove aftersaid seed Cu sputtering step, and fabricating an interconnection byusing CMP method; a hole reduction impurity fabricating step(C) ofion-implanting hole reduction impurities in order to reduce holesfabricated in a second interface between said Cu or Cu alloy layer andan insulating cap layer fabricated on said Cu or Cu alloy layer toinsulate and protect said Cu or Cu alloy layer after said Cuinterconnection fabricating step, and executing heat treatment; anatural oxide layer removing step of removing a natural oxide layer ofsaid Cu by executing treatment such as cleaning and/or plasmairradiation on a surface of said interconnection after said second holereduction impurity fabricating step; an insulating cap layer sputteringdeposition step of depositing said insulating cap layer by sputteringafter said natural oxide layer removing step; and, thereby making saidhole reduction impurities precipitate in said vicinity of said secondinterface.
 23. The method for manufacturing a copper interconnection,according to claim 22, wherein in place of making said hole reductionimpurities precipitate in said vicinity of said second interface,fabricating a solid solution of said hole reduction impurities with saidCu in said vicinity of said second interface.
 24. The method formanufacturing a copper interconnection, according to claim 22, whereinin place of making said hole reduction impurities precipitate in saidvicinity of said second interface, making said hole reduction impuritiesa Cu amorphous in said vicinity of said second interface.
 25. The methodfor manufacturing a copper interconnection, according to claim 22,wherein in place of making said hole reduction impurities precipitate insaid vicinity of said second interface, fabricating a Cu compound withsaid Cu in said vicinity of said second interface.
 26. A method formanufacturing a copper interconnection, comprising: a barrier metalsputtering step of sputtering barrier metal ion an interconnectiongroove; a seed Cu sputtering step of sputtering seed Cu which becomes aseed after said barrier metal sputtering step; a Cu interconnectionfabricating step of embedding a Cu or Cu alloy layer in saidinterconnection groove after said seed Cu sputtering step, andfabricating an interconnection by using CMP method; a hole reductionimpurity fabricating step(D) of depositing hole reduction impurities bya solid phase in order to reduce holes fabricated in a second interfacebetween said Cu or Cu alloy layer and an insulating cap layer fabricatedon said Cu or Cu alloy layer to insulate and protect said Cu or Cu alloylayer after said Cu interconnection fabricating step, and executing heattreatment; a natural oxide layer removing step of removing a naturaloxide layer of said Cu by executing treatment such as cleaning and/orplasma irradiation on a surface of said interconnection after saidsecond hole reduction impurity fabricating step; an insulating cap layersputtering deposition step of depositing said insulating cap layer bysputtering after said natural oxide layer removing step; and therebymaking said hole reduction impurities precipitate in said vicinity ofsaid second interface.
 27. The method for manufacturing a copperinterconnection, according to claim 26, wherein in place of making saidhole reduction impurities precipitate in said vicinity of said secondinterface, fabricating a Cu compound with said Cu in said vicinity ofsaid second interface.
 28. The method for manufacturing a copperinterconnection, according to claim 26, wherein in place of said holereduction impurity depositing step, a Cu compound fabricating step offabricating a compound with said Cu in said vicinity of said secondinterface is executed.
 29. The method for manufacturing a copperinterconnection, according to claim 22, wherein said natural oxide layerremoving step is executed after said Cu interconnection fabricatingstep, and then said hole reduction impurity fabricating step(C) isexecuted.
 30. The method for manufacturing a copper interconnection,according to claim 26, wherein said natural oxide layer removing step isexecuted after said Cu interconnection fabricating step, and then saidhole reduction impurity fabricating step(D) is executed.
 31. The methodfor manufacturing a copper interconnection, according to claim 11,wherein said hole reduction impurities are one selected from Nb, Ta, Si,Ru, and V.
 32. The method for manufacturing a copper interconnection,according to claim 15, wherein said hole reduction impurities are oneselected from Nb, Ta, Si, Ru, and V.
 33. The method for manufacturing acopper interconnection, according to claim 18, wherein said holereduction impurities are one selected from Nb, Ta, Si, Ru, and V. 34.The method for manufacturing a copper interconnection, according toclaim 22, wherein said hole reduction impurities are one selected fromNb, Ta, Si, Ru, and V.
 35. The method for manufacturing a copperinterconnection, according to claim 26, wherein said hole reductionimpurities are one selected from Nb, Ta, Si, Ru, and V.
 36. A copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, comprising:at least one or more copper interconnections included in a group ofinterconnections of said lower interconnection layer, said upperinterconnection layer or said via hole, wherein said copperinterconnection is provided with a barrier metal layer fabricated on aninterconnection groove, a Cu or Cu alloy layer for an interconnectionfabricated on said barrier metal layer, and hole reduction impuritiesadded to said Cu precipitated in a first interface in order to reduceholes fabricated in said first interface between said Cu or Cu alloylayer and said barrier metal layer.
 37. A copper interconnection withmulti-layers having a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, comprising: at least one or morecopper interconnections included in a group of interconnections of saidlower interconnection layer, said upper interconnection layer or saidvia hole, wherein said copper interconnection is provided with a barriermetal layer fabricated on an interconnection groove, a Cu or Cu alloylayer for an interconnection fabricated on said barrier metal layer, andhole reduction impurities added to said Cu to fabricate a solid solutionin a first interface in order to reduce holes fabricated in said firstinterface between said Cu or Cu alloy layer and said barrier metallayer.
 38. A copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, comprising: at least one or more copper interconnectionsincluded in a group of interconnections of said lower interconnectionlayer, said upper interconnection layer or said via hole, wherein saidcopper interconnection is provided with a barrier metal layer fabricatedon an interconnection groove, a Cu or Cu alloy layer for aninterconnection fabricated on said barrier metal layer, and a Cu holereduction amorphous layer present in a first interface in order toreduce holes fabricated in said first interface between said Cu or Cualloy layer and said barrier metal layer.
 39. A copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, comprising: at leastone or more copper interconnections included in a group ofinterconnections of said lower interconnection layer, said upperinterconnection layer or said via hole, wherein said copperinterconnection is provided with a barrier metal layer fabricated on aninterconnection groove, a Cu or Cu alloy layer for an interconnectionfabricated on said barrier metal layer, and a hole reduction compoundlayer present in a first interface, in which a compound with said Cu isfabricated, in order to reduce holes fabricated in said first interfacebetween said Cu or Cu alloy layer and said barrier metal layer.
 40. Acopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers,comprising: at least one or more copper interconnections included insaid lower interconnection layer, said upper interconnection layer orsaid via hole, wherein said copper interconnection is provided with abarrier metal layer fabricated on an interconnection groove, a Cu or Cualloy layer for an interconnection fabricated on said barrier metallayer, an insulating cap layer fabricated on said Cu or Cu alloy layerto protect and insulate said Cu or Cu alloy layer, and hole reductionimpurities added to said Cu precipitated in a second interface in orderto reduce holes fabricated in said second interface between said Cu orCu alloy layer and said insulating cap layer.
 41. A copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, comprising:at least one or more copper interconnections included in said lowerinterconnection layer, said upper interconnection layer or said viahole, wherein said copper interconnection is provided with a barriermetal layer fabricated on an interconnection groove, a Cu or Cu alloylayer for an interconnection fabricated on said barrier metal layer, aninsulating cap layer fabricated on said Cu or Cu alloy layer to protectand insulate said Cu or Cu alloy layer, and hole reduction impuritiesadded to said Cu to fabricate a solid solution in a second interface inorder to reduce holes fabricated in said second interface between saidCu or Cu alloy layer and said insulating cap layer.
 42. A copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, comprising:at least one or more copper interconnections included in said lowerinterconnection layer, said upper interconnection layer or said viahole, wherein said copper interconnection is provided with a barriermetal layer fabricated on an interconnection groove, a Cu or Cu alloylayer for an interconnection fabricated on said barrier metal layer, aninsulating cap layer fabricated on said Cu or Cu alloy layer to protectand insulate said Cu or Cu alloy layer, and a hole reduction amorphouslayer present in a second interface, in which said Cu is made amorphous,in order to reduce holes fabricated in said second interface betweensaid Cu or Cu alloy layer and said insulating cap layer.
 43. A copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, comprising:at least one or more copper interconnections included in said lowerinterconnection layer, said upper interconnection layer or said viahole, wherein said copper interconnection is provided with a barriermetal layer fabricated on an interconnection groove, a Cu or Cu alloylayer for an interconnection fabricated on said barrier metal layer, aninsulating cap layer fabricated on said Cu or Cu alloy layer to protectand insulate said Cu or Cu alloy layer, and a hole reduction compoundlayer present in a second interface, in which a compound with said Cu isfabricated, in order to reduce holes fabricated in said second interfacebetween said Cu or Cu alloy layer and said insulating cap layer.
 44. Thecopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers,according to claim 36, wherein said hole reduction impurities are oneselected from Nb, Ta, Si, Ru, and V.
 45. The copper interconnection withmulti-layers having a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 36, wherein saidmulti-layer interconnection structure is a single damascene.
 46. Thecopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers,according to claim 37, wherein said multi-layer interconnectionstructure is a single damascene.
 47. The copper interconnection withmulti-layers having a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 38, wherein saidmulti-layer interconnection structure is a single damascene.
 48. Thecopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers,according to claim 39, wherein said multi-layer interconnectionstructure is a single damascene.
 49. The copper interconnection withmulti-layers having a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 40, wherein saidmulti-layer interconnection structure is a single damascene.
 50. Thecopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers,according to claim 41, wherein said multi-layer interconnectionstructure is a single damascene.
 51. The copper interconnection withmulti-layers having a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 42, wherein saidmulti-layer interconnection structure is a single damascene.
 52. Thecopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers,according to claim 43, wherein said multi-layer interconnectionstructure is a single damascene.
 53. The copper interconnection withmulti-layers having a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 36, wherein saidmulti-layer interconnection structure is a dual damascene, and said dualdamascene is fabricated in a via first process for fabricating aninterconnection groove after opening of a via.
 54. The copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, according toclaim 37, wherein said multi-layer interconnection structure is a dualdamascene, and said dual damascene is fabricated in a via first processfor fabricating an interconnection groove after opening of a via. 55.The copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 38, wherein said multi-layer interconnectionstructure is a dual damascene, and said dual damascene is fabricated ina via first process for fabricating an interconnection groove afteropening of a via.
 56. The copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 39, wherein saidmulti-layer interconnection structure is a dual damascene, and said dualdamascene is fabricated in a via first process for fabricating aninterconnection groove after opening of a via.
 57. The copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, according toclaim 40, wherein said multi-layer interconnection structure is a dualdamascene, and said dual damascene is fabricated in a via first processfor fabricating an interconnection groove after opening of a via. 58.The copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 41, wherein said multi-layer interconnectionstructure is a dual damascene, and said dual damascene is fabricated ina via first process for fabricating an interconnection groove afteropening of a via.
 59. The copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 42, wherein saidmulti-layer interconnection structure is a dual damascene, and said dualdamascene is fabricated in a via first process for fabricating aninterconnection groove after opening of a via.
 60. The copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, according toclaim 43, wherein said multi-layer interconnection structure is a dualdamascene, and said dual damascene is fabricated in a via first processfor fabricating an interconnection groove after opening of a via. 61.The copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 36, wherein said dual damascene is fabricatedin a trench first process for opening a via after fabrication of aninterconnection groove.
 62. The copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 37, wherein saiddual damascene is fabricated in a trench first process for opening a viaafter fabrication of an interconnection groove.
 63. The copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, according toclaim 38, wherein said dual damascene is fabricated in a trench firstprocess for opening a via after fabrication of an interconnectiongroove.
 64. The copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 39, wherein said dual damascene is fabricatedin a trench first process for opening a via after fabrication of aninterconnection groove.
 65. The copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 40, wherein saiddual damascene is fabricated in a trench first process for opening a viaafter fabrication of an interconnection groove.
 66. The copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, according toclaim 41, wherein said dual damascene is fabricated in a trench firstprocess for opening a via after fabrication of an interconnectiongroove.
 67. The copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 42, wherein said dual damascene is fabricatedin a trench first process for opening a via after fabrication of aninterconnection groove.
 68. The copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 43, wherein saiddual damascene is fabricated in a trench first process for opening a viaafter fabrication of an interconnection groove.
 69. A method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, at least one or more of said lower interconnection layer, saidupper interconnection layer, and said via hole being fabricated in amanufacturing process of said copper interconnection, said processcomprising: a barrier metal sputtering step of sputtering barrier metalon an interconnection groove; a hole reduction impurity fabricatingstep(A) of ion-implanting hole reduction impurities in said barriermetal in order to reduce holes fabricated in a first interface between aCu or , Cu alloy layer for an interconnection and said barrier metallayer after said barrier metal sputtering step, and executing heattreatment; a seed Cu sputtering step of sputtering seed Cu which becomesa seed after said hole reduction impurity fabricating step(A); a Cudepositing step of depositing Cu which makes an interconnection on saidseed Cu after said seed Cu sputtering step; and, thereby making saidhole reduction impurities precipitate in said vicinity of said firstinterface.
 70. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, at least one or moreof said lower interconnection layer, said upper interconnection layer,and said via hole being fabricated in said manufacturing process of saidcopper interconnection, according to claim 69, wherein in place ofmaking said hole reduction impurities precipitate in said vicinity ofsaid first interface, fabricating a solid solution of said holereduction impurities with said Cu in said vicinity of said firstinterface.
 71. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, at least one or moreof said lower interconnection layer, said upper interconnection layer,and said via hole being fabricated in said manufacturing process of saidcopper interconnection, according to claim 69, wherein in place ofmaking said hole reduction impurities precipitate in said vicinity ofsaid first interface, making said hole reduction impurities a Cuamorphous in said vicinity of said first interface.
 72. The method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, at least one or more of said lower interconnection layer, saidupper interconnection layer, and said via hole being fabricated in saidmanufacturing process of said copper wire, according to claim 69,wherein in place of making said hole reduction impurities precipitate insaid vicinity of said first interface, fabricating a Cu compound withsaid Cu in said vicinity of said first interface.
 73. A method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, at least one or more of said lower interconnection layer, saidupper interconnection layer, and said via hole being fabricated in amanufacturing process of said copper interconnection, said processcomprising: a barrier metal sputtering step of sputtering barrier metalon an interconnection groove; a hole reduction impurity fabricatingstep(B) of depositing hole reduction impurities by a solid phase inorder to reduce holes fabricated in a first interface between a Cu or Cualloy layer for an interconnection and said barrier metal layer aftersaid sputtering step, and diffusing said impurities by heat; a holereduction impurity fabricating step of implanting ions in said barriermetal to execute heat treatment; a seed Cu sputtering step of sputteringseed Cu which becomes a seed after said hole reduction impurityfabricating step(B); a Cu depositing step of depositing Cu which makesan interconnection on said seed Cu after said seed Cu sputtering step;and thereby making said hole reduction impurities precipitate in saidvicinity of said first interface.
 74. The method for manufacturing acopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers, at leastone or more of said lower interconnection layer, said upperinterconnection layer, and said via hole being fabricated in saidmanufacturing process of said copper interconnection, according to claim73, wherein in place of making said hole reduction impuritiesprecipitate in said vicinity of said first interface, fabricating asolid solution of said hole reduction impurities with said Cu in saidvicinity of said first interface.
 75. The method for manufacturing acopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers, at leastone or more of said lower interconnection layer, said upperinterconnection layer, and said via hole being fabricated in saidmanufacturing process of said copper interconnection, according to claim73, wherein in place of making said hole reduction impuritiesprecipitate in said vicinity of said first interface, fabricating a Cucompound with said Cu in said vicinity of said first interface.
 76. Amethod for manufacturing a copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on the lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, at least one or more of said lowerinterconnection layer, said upper interconnection layer, and said viahole being fabricated in a manufacturing process of said copperinterconnection, said process comprising: a barrier metal sputteringstep of sputtering barrier metal on an interconnection groove; a seed Cusputtering step of sputtering seed Cu which becomes a seed after saidbarrier metal sputtering step; a hole reduction impurity fabricatingstep(A) of ion-implanting hole reduction impurities in said barriermetal in order to reduce holes fabricated in a first interface between aCu or Cu alloy layer for an interconnection and said barrier metal layerafter said seed Cu sputtering step, and executing heat treatment; a Cudepositing step of depositing Cu which makes an interconnection on saidseed Cu after said hole reduction impurity fabricating step(A); andthereby making said hole reduction impurities precipitate in saidvicinity of said first interface.
 77. The method for manufacturing acopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers, at leastone or more of said lower interconnection layer, said upperinterconnection layer, and said via hole being fabricated in saidmanufacturing process of said copper interconnection, according to claim76, wherein in place of making said hole reduction impuritiesprecipitate in said vicinity of said first interface, fabricating asolid solution of said hole reduction impurities with said Cu in saidvicinity of said first interface.
 78. The method for manufacturing acopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers, at leastone or more of said lower interconnection layer, said upperinterconnection layer, and said via hole being fabricated in saidmanufacturing process of said copper interconnection, according to claim76, wherein in place of making said hole reduction impuritiesprecipitate in said vicinity of said first interface, making said holereduction impurities a Cu amorphous in said vicinity of said firstinterface.
 79. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, at least one or moreof said lower interconnection layer, said upper interconnection layer,and said via hole being fabricated in said manufacturing process of saidcopper interconnection, according to claim 76, wherein in place ofmaking said hole reduction impurities precipitate in said vicinity ofsaid first interface, fabricating a Cu compound with said Cu in saidvicinity of said first interface.
 80. A method for manufacturing acopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on thelower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers, at leastone or more of said lower interconnection layer, said upperinterconnection layer, and said via hole being fabricated in amanufacturing process of said copper interconnection, said processcomprising: a barrier metal sputtering step of sputtering barrier metalon an interconnection groove; a seed Cu sputtering step of sputteringseed Cu which becomes a seed after said barrier metal sputtering step; aCu interconnection fabricating step of embedding a Cu or Cu alloy layerin said interconnection groove after said seed Cu sputtering step, andfabricating an interconnection by using CMP method; a hole reductionimpurity fabricating step(C) of ion-implanting hole reduction impuritiesin order to reduce holes fabricated in a second interface between saidCu or Cu alloy layer and an insulating cap layer fabricated on said Cuor Cu alloy layer to insulate and protect said Cu or Cu alloy layerafter said Cu interconnection fabricating step, and executing heattreatment; a natural oxide layer removing step of removing a naturaloxide layer of said Cu by executing treatment such as cleaning and/orplasma irradiation on a surface of said interconnection after saidsecond hole reduction impurity fabricating step; an insulating cap layersputtering deposition step of depositing said insulating cap layer bysputtering after said natural oxide layer removing step; and therebymaking said hole reduction impurities precipitate in said vicinity ofsaid first interface.
 81. The method for manufacturing a copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, at least oneor more of said lower interconnection layer, said upper interconnectionlayer, and said via hole being fabricated in said manufacturing processof said copper interconnection, according to claim 80, wherein in placeof making said hole reduction impurities precipitate in said vicinity ofsaid second interface, fabricating a solid solution of said holereduction impurities with said Cu in said vicinity of said secondinterface.
 82. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, at least one or moreof said lower interconnection layer, said upper interconnection layer,and said via hole being fabricated in said manufacturing process of saidcopper interconnection, according to claim 80, wherein in place ofmaking said hole reduction impurities precipitate in said vicinity ofsaid second interface, making said hole reduction impurities a Cuamorphous in said vicinity of said second interface.
 83. The method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, at least one or more of said lower interconnection layer, saidupper interconnection layer, and said via hole being fabricated in saidmanufacturing process of said copper interconnection, according to claim80, wherein in place of making said hole reduction impuritiesprecipitate in said vicinity of said second interface, fabricating a Cucompound with said Cu in said vicinity of said second interface.
 84. Amethod for manufacturing a copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on the lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, at least one or more of said lowerinterconnection layer, said upper interconnection layer, and said viahole being fabricated in a manufacturing process of said copperinterconnection, said process comprising: a barrier metal sputteringstep of sputtering barrier metal on an interconnection groove; a seed Cusputtering step of sputtering seed Cu which becomes a seed after saidbarrier metal sputtering step; a Cu interconnection fabricating step ofembedding a Cu or Cu alloy layer in said interconnection groove aftersaid seed Cu sputtering step, and fabricating an interconnection byusing CMP method; a hole reduction impurity fabricating step(D) ofdepositing hole reduction impurities by a solid phase in order to reduceholes fabricated in a second interface between said Cu or Cu alloy layerand an insulating cap layer fabricated on said Cu or Cu alloy layer toinsulate and protect said Cu or Cu alloy layer after said Cuinterconnection fabricating step, and executing heat treatment; anatural oxide layer removing step of removing a natural oxide layer ofsaid Cu by executing treatment such as cleaning and/or plasmairradiation on a surface of said interconnection after said second holereduction impurity fabricating step; an insulating cap layer sputteringdeposition step of depositing said insulating cap layer by sputteringafter said natural oxide layer removing step; and, thereby making saidhole reduction impurities precipitate in said vicinity of said secondinterface.
 85. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, at least one or moreof said lower interconnection layer, said upper interconnection layer,and said via hole being fabricated in said manufacturing process of saidcopper interconnection, according to claim 84, wherein in place ofmaking said hole reduction impurities precipitate in said vicinity ofsaid second interface, fabricating a solid solution of said holereduction impurities with said Cu in said vicinity of said secondinterface.
 86. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, at least one or moreof said lower interconnection layer, said upper interconnection layer,and said via hole being fabricated in said manufacturing process of saidcopper interconnection, according to claim 84, wherein in place ofmaking said hole reduction impurities precipitate in said vicinity ofsaid second interface, fabricating a Cu compound with said Cu in saidvicinity of said second interface.
 87. The method for manufacturing acopper interconnection with multi-layers having a lower interconnectionlayer of one layer, an upper interconnection layer positioned on saidlower interconnection layer to be different from said one layer, and avia hole for interconnecting said lower and upper wring layers, at leastone or more of said lower interconnection layer, said upperinterconnection layer, and said via hole being fabricated in saidmanufacturing process of said copper interconnection, according to claim80, wherein said natural oxide layer removing step is executed aftersaid Cu interconnection fabricating step, and then said second holereduction impurity fabricating step is executed.
 88. The method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, at least one or more of said lower interconnection layer, saidupper interconnection layer, and said via hole being fabricated in saidmanufacturing process of said copper interconnection, according to claim84, wherein said natural oxide layer removing step is executed aftersaid Cu interconnection fabricating step, and then said third holereduction impurity fabricating step is executed.
 89. The method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, at least one or more of said lower interconnection layer, saidupper interconnection layer, and said via hole being fabricated in saidmanufacturing process of said copper interconnection, according to claim69, wherein the hole reduction impurities are one selected from Nb, Ta,Si, Ru, and V.
 90. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim69, wherein said multi-layers interconnection structure is a singledamascene.
 91. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim70, wherein said multi-layers interconnection structure is a singledamascene.
 92. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim71, wherein said multi-layers interconnection structure is a singledamascene.
 93. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim72, wherein said multi-layers interconnection structure is a singledamascene.
 94. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim73, wherein said multi-layers interconnection structure is a singledamascene.
 95. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim74, wherein said multi-layers interconnection structure is a singledamascene.
 96. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim75, wherein said multi-layers interconnection structure is a singledamascene.
 97. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim76, wherein said multi-layers interconnection structure is a singledamascene.
 98. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim77, wherein said multi-layers interconnection structure is a singledamascene.
 99. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim78, wherein said multi-layers interconnection structure is a singledamascene.
 100. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim79, wherein said multi-layers interconnection structure is a singledamascene.
 101. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim80, wherein said multi-layers interconnection structure is a singledamascene.
 102. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim81, wherein said multi-layers interconnection structure is a singledamascene.
 103. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim82, wherein said multi-layers interconnection structure is a singledamascene.
 104. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim83, wherein said multi-layers interconnection structure is a singledamascene.
 105. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim84, wherein said multi-layers interconnection structure is a singledamascene.
 106. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim85, wherein said multi-layers interconnection structure is a singledamascene.
 107. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim86, wherein said multi-layers interconnection structure is a singledamascene.
 108. The method for manufacturing a copper interconnectionwith multi-layers having a lower interconnection layer of one layer, anupper interconnection layer positioned on said lower interconnectionlayer to be different from said one layer, and a via hole forinterconnecting said lower and upper wring layers, according to claim69, wherein said multi-layer interconnection structure is a dualdamascene, and said dual damascene is fabricated in at least one of avia first process for fabricating said interconnection groove afteropening of said via, a trench first process for opening said via afterfabrication of said interconnection groove.
 109. The method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 70, wherein said multi-layer interconnectionstructure is a dual damascene, and said dual damascene is fabricated inat least one of a via first process for fabricating said interconnectiongroove after opening of said via, a trench first process for openingsaid via after fabrication of said interconnection groove.
 110. Themethod for manufacturing a copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 71, wherein saidmulti-layer interconnection structure is a dual damascene, and said dualdamascene is fabricated in at least one of a via first process forfabricating said interconnection groove after opening of said via, atrench first process for opening said via after fabrication of saidinterconnection groove.
 111. The method for manufacturing a copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, according toclaim 72, wherein said multi-layer interconnection structure is a dualdamascene, and said dual damascene is fabricated in at least one of avia first process for fabricating said interconnection groove afteropening of said via, a trench first process for opening said via afterfabrication of said interconnection groove.
 112. The method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 73, wherein said multi-layer interconnectionstructure is a dual damascene, and said dual damascene is fabricated inat least one of a via first process for fabricating said interconnectiongroove after opening of said via, a trench first process for openingsaid via after fabrication of said interconnection groove.
 113. Themethod for manufacturing a copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 74, wherein saidmulti-layer interconnection structure is a dual damascene, and said dualdamascene is fabricated in at least one of a via first process forfabricating said interconnection groove after opening of said via, atrench first process for opening said via after fabrication of saidinterconnection groove.
 114. The method for manufacturing a copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, according toclaim 75, wherein said multi-layer interconnection structure is a dualdamascene, and said dual damascene is fabricated in at least one of avia first process for fabricating said interconnection groove afteropening of said via, a trench first process for opening said via afterfabrication of said interconnection groove.
 115. The method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 76, wherein said multi-layer interconnectionstructure is a dual damascene, and said dual damascene is fabricated inat least one of a via first process for fabricating said interconnectiongroove after opening of said via, a trench first process for openingsaid via after fabrication of said interconnection groove.
 116. Themethod for manufacturing a copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 77, wherein saidmulti-layer interconnection structure is a dual damascene, and said dualdamascene is fabricated in at least one of a via first process forfabricating said interconnection groove after opening of said via, atrench first process for opening said via after fabrication of saidinterconnection groove.
 117. The method for manufacturing a copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, according toclaim 78, wherein said multi-layer interconnection structure is a dualdamascene, and said dual damascene is fabricated in at least one of avia first process for fabricating said interconnection groove afteropening of said via, a trench first process for opening said via afterfabrication of said interconnection groove.
 118. The method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 79, wherein said multi-layer interconnectionstructure is a dual damascene, and said dual damascene is fabricated inat least one of a via first process for fabricating said interconnectiongroove after opening of said via, a trench first process for openingsaid via after fabrication of said interconnection groove.
 119. Themethod for manufacturing a copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 80, wherein saidmulti-layer interconnection structure is a dual damascene, and said dualdamascene is fabricated in at least one of a via first process forfabricating said interconnection groove after opening of said via, atrench first process for opening said via after fabrication of saidinterconnection groove.
 120. The method for manufacturing a copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, according toclaim 81, wherein said multi-layer interconnection structure is a dualdamascene, and said dual damascene is fabricated in at least one of avia first process for fabricating said interconnection groove afteropening of said via, a trench first process for opening said via afterfabrication of said interconnection groove.
 121. The method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 82, wherein said multi-layer interconnectionstructure is a dual damascene, and said dual damascene is fabricated inat least one of a via first process for fabricating said interconnectiongroove after opening of said via, a trench first process for openingsaid via after fabrication of said interconnection groove.
 122. Themethod for manufacturing a copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 83, wherein saidmulti-layer interconnection structure is a dual damascene, and said dualdamascene is fabricated in at least one of a via first process forfabricating said interconnection groove after opening of said via, atrench first process for opening said via after fabrication of saidinterconnection groove.
 123. The method for manufacturing a copperinterconnection with multi-layers having a lower interconnection layerof one layer, an upper interconnection layer positioned on said lowerinterconnection layer to be different from said one layer, and a viahole for interconnecting said lower and upper wring layers, according toclaim 84, wherein said multi-layer interconnection structure is a dualdamascene, and said dual damascene is fabricated in at least one of avia first process for fabricating said interconnection groove afteropening of said via, a trench first process for opening said via afterfabrication of said interconnection groove.
 124. The method formanufacturing a copper interconnection with multi-layers having a lowerinterconnection layer of one layer, an upper interconnection layerpositioned on said lower interconnection layer to be different from saidone layer, and a via hole for interconnecting said lower and upper wringlayers, according to claim 85, wherein said multi-layer interconnectionstructure is a dual damascene, and said dual damascene is fabricated inat least one of a via first process for fabricating said interconnectiongroove after opening of said via, a trench first process for openingsaid via after fabrication of said interconnection groove.
 125. Themethod for manufacturing a copper interconnection with multi-layershaving a lower interconnection layer of one layer, an upperinterconnection layer positioned on said lower interconnection layer tobe different from said one layer, and a via hole for interconnectingsaid lower and upper wring layers, according to claim 86, wherein saidmulti-layer interconnection structure is a dual damascene, and said dualdamascene is fabricated in at least one of a via first process forfabricating said interconnection groove after opening of said via, atrench first process for opening said via after fabrication of saidinterconnection groove.